1. Field of the Invention
The present invention relates to a multilayer electronic component, particularly to a multilayer capacitor comprising, a laminate comprising dielectric layers and internal electrodes; via-conductors penetrating the dielectric layers and connecting the internal electrodes; and external terminals formed on an outer surface of the laminate; and also relates to a method for producing the multilayer electronic component.
2. Description of the Related Art
Conventionally, a multilayer electronic component such as a multilayer ceramic capacitor and a multilayer wiring substrate contains a laminate in which a plurality of dielectric layers and a plurality of internal electrode layers are alternately laminated. Inside the laminate, the via-conductors penetrating the dielectric ceramic layers and connecting to the internal electrodes are formed so as to reduce inductance of the multilayer component. External terminals or rather external terminal pads for connecting to other electronic components are formed on the surfaces of the laminate as disclosed in U.S. Pat. No. 6,795,295 B2.
In Patent Document 1, each end of the via-conductors projects from the top and bottom surfaces of the laminated portion so as to serve as an external terminal electrode. In Patent Document 2, external terminal pads are attached to each end of the via conductors to serve as an external terminal electrode situated on the top surface of the laminated portion.
[Patent Document 1]: Japanese Patent Application Laid-Open (kokai) No. 2003-318064
[Patent Document 2]: Japanese Patent Application Laid-Open (kokai) No. 2003-158030
For example, conventional multilayer electronic components are produced by the following procedure. First, green ceramic sheets are prepared, and green internal electrode layers are formed on the surface thereof by printing an electrically conductive metallic paste. Next, these green sheets printed with the green internal electrode layers are laminated into a green ceramic laminate and then via-holes penetrating the green ceramic laminate are formed. Subsequently, the insides of the via-holes are filled with electrically conductive metallic paste to form via-conductors connecting to the internal electrodes. The electrically conductive metallic paste is also applied onto surfaces of the ceramic laminate to form external terminals connecting to the via-conductors. Then, the green ceramic laminate is fired so that the dielectric ceramic layers and the metallic electrodes are co-fired into a multilayer ceramic component. The external terminals are nickel-plated so as to assure soldering with other electronic components such as an IC chip and an IC chip substrate. Solder bumps comprising tin are normally formed on the external terminals for solder connection of other electronic components.
Reliable solderability and a durable solder bond are needed for solder-bonding an IC chip or IC chip carrying substrate to multilayer components such as a multilayer ceramic capacitor and a multilayer wiring substrate. In order to attain a reliable solderability, the nickel-plated external terminal has been further plated with gold. However, in recent years, lead-free solder comprising tin (Sn) having a high temperature melting point has become widely used but the area for forming external terminals on the multilayer is very limited. Thus, mere consideration of the material for the external electrode such as the use of gold-plated external terminals has not satisfactorily improved soldering process yield. Since the ends of the via-conductors penetrating the dielectric layers after drying and co-firing are likely recessed or rather not coplanar with the outer surface of the laminate due to the different shrinkage rates between dielectric layers and internal metallic electrodes, it is difficult to form uniform and coplanar external terminals for reliably connecting to other electronic components. Therefore, the shape of an external terminal on which a solder ball is molten in a solder reflow process is another factor which requires improvement with respect to solderability and durable solder bonding thereof.